Power transistor and method of manufacture



Dec. 14, 1965 J. E. WRIGHT ETAL 3,223,902

POWER TRANSISTOR AND METHOD OF MANUFACTURE Original Filed Aug. 29. 1958mega/e; 1 /11 102 91 32 36 INVENTOR.

JOSEPH SHELL/CK JflOME Awe/ ar United States Patent 3,223,902 POWERTRANSXSTOR AND METHOD OF MANUFACTURE Jerome E. Wright, Plainfieltl, andJoseph Shellick, Manville, N..l., assignors to Radio Corporation ofAmerica, a corporation of Delaware Original application Aug. 29, 1958,Ser. No. 758,090, new Patent No. 3,109,225, dated Nov. 5, 1963. Dividedand this application Mar. 19, 1963, Ser. No. 266,364

4 Claims. (Cl. 317-434) This application is a division of our co-pendingapplication Serial No. 758,090, filed August 29, 1958, which issued onNovember 5, 1963 as US. Patent 3,109,225, and was assigned to theassignee of this application.

This invention relates to improved semiconductor devices, and toimproved methods of fabricating them. More particularly, the inventionrelates to an improved method of providing thermal dissipaion in PNjunctiontype semiconductor devices used in power applications.

An important class of semiconductor devices, known as transistors,usually comprises a semiconductive body having three regions or zones ofdifferent conductivity type separated by two PN junctions. The zones maybe arranged in PNP or NPN order. Such devices with regions of alternateconductivity type separated by rectifying barriers may be formed byseveral methods. One of these methods is the surface alloy process, inwhich two pellets that induce conductivity of given type are positionedon opposing surfaces of a monocrystalline semiconductive wafer of theopposite conductivity type. The assembly is then heated so that thepellets melt and dissolve some of the wafer material. Upon cooling, thedissolved wafer material recrystallizes in the original semiconductorlattice, but contains sufficient pellet material to form a zone of thegiven conductivity type. At the interface between each recrystallizedgiven conductivity type zone and the unchanged opposite conductivitytype bulk of the wafer, 21 rectifying barrier is formed. The fusedpellets become device electrodes.

In surface alloyed transistors one of the two recrystallized regions isoperated as the emitter, while the other region is operated as thecollector. An ohmic nonrectifying contact is made to the bulk of thewafer, which constitutes the base region of the device. When an inputsignal is applied between the emitter and base electrodes, the emitterregion injects minority carriers into the base region. Minority carriersin a semi-conductor are charge carriers of type opposite to theconductivity type of the semiconductor. In a PNP transistor the baseregion is the N region, hence while the majority carriers in the baseare N-type, the minority carriers in the base region are P-type defectelectrons or holes. In an NPN transistor the minority carriers areN-type, i.e., electrons. The minority carriers are injected at lowimpedance, diffused through the base region, and are collected at highimpedance by the collector electrode, thereby producing power gain.

The operation of semiconductor devices generates unwanted heat. As inmost electrical devices, the more power handled, the more heatgenerated. In devices of the transistor type which contain respectivelyan emitter region, a rectifying barrier known as the emitter junction, abase region, a rectifying barrier known as the collector junction, and acollector region, most of the heat is generated in the collector region.The generated heat must be dissipated, since otherwise the temperatureof the device rises to a level at which the thermal energy elevateselectrons across the energy gap from the valence band to the conductorband, so that the device is no longer operative. In most cases,temperatures above C. change the nature of the semiconductor surface, sothat the current gain is markedly decreased even before the temperatureis attained at which thermal energy renders the device inoperative. Itis desirable to keep the operating temperature of a transistor close tothe ambient temperature to simplify circuit stabilization. Thedissipation of the generated heat is particularly important in theoperation of power transistors, as the power handling capabilities ofsuch devices depends on their rate of cooling. Transistors in which thesemiconductor wafer is germanium are generally not operative above about100 C. Excessive heating may permanently injure or completely destroysemiconductor devices.

Various methods have been employed to dissipate the heat generated bysemiconductive devices. For example, one solution of the problem of heatdissipation has been to immerse the semiconductor device in a metalliccontainer filled with an oil or other liquid. However, the liquidsgenerally used have been unsatisfactory because they do not providesuflicient heat dissipation, and because they often impair theelectrical characteristics of the device by adversely affecting thesurface of the semiconductor crystal.

A different method has been used for dissipating heat from devices suchas alloy junction power transistors. The transistors have been bonded toheat dissipators, or heat sinks, which are usually comparatively largemetallic bodies that absorb the heat generated by the device. The heatdissipator transfers the absorbed heat to the chassis, or directly tothe atmosphere, which is the ultimate heat sink. A serious difiiculty inthis method has been the production of a low-thermal-resistanceconnection between the device and the metallic body which absorbs andtransfers the heat. One solution of this problem utilizes anindium-to-indium cold pressure weld between the heat sink and thealloyed indium collector electrode. However, this technique is notapplicable to surface alloyed transistors in which the electrode pelletsare made of materials other than indium. For example, in NPN units theelectrode pellets consist predominantly of lead, with small amounts ofdonors such as arsenic or antimony. Such pellets cannot be coated withindium, since the indium forms a mechanically weak bond with lead, andfurthermore acts as an acceptor to disturb the electricalcharacteristics of the device. Other electrode pellet materials such asaluminum are also incapable of forming a strong bond with indium.

Attempts have been made to mount such transistors on a metallic heatsink, such as a copper support, by soldering an electrode directly tothe support. However, this approach has not been satisfactory, sincesoldering flux and other undesirable materials are thereby spread aroundthe electrode and its associated rectifying junction. Normally suchimpurities may be removed by means of an etchant, but it is notpracticable to etch the device when it is connected to a relativelylarge mass of metal. The instant application relates to a techniquewhich may be utilized with surface alloyed semiconductor devices whichhave electrodes that do not contain indium, such as electrodesconsisting of lead or aluminum.

An object of this invenion is to provide an improved semiconductordevice suitable for power operations.

Another object is to improve heat dissipation in junction-typesemiconductor devices.

But another object of this invention is to provide an improved junctiontransistor having good heat-dissipating characteristics and improvedelectrical characteristics.

A further object of the invention is to provide an improved method formanufacturing semiconductor devices.

Still another object of the invention is to provide an improved methodof bonding a semiconductor device to a heat-dissipating structure.

Yet another object of the invention is to provide an improved connectionwith low thermal resistance between a power transistor and a heatdissipator.

Another object of the invention is to provide an improved method ofmounting semiconductor devices to obtain improved cooling.

These and other objects are accomplished by the instant invention, whichprovides an improved room-temperature method of making a bond with lowthermal resistance between a heat dissipator and a semiconductor devicehaving at least one electrode comprising a material which is incapableof forming a strong bond with indium. In a preferred form of theinvention, the method comprises bonding said electrode to one face of asmall metal plate. The opposite face of the metal plate bears a layer ofindium, or alternatively an indium layer is deposited on this face afterthe plate has been bonded, for example by soldering, to the electrode.Since the metal plate is relatively small compared to the device, theassembly of device and plate may be immersed in an acid bath and etchedto remove the flux and other impurities around the electrode. An indiumlayer is also deposited on a supporting base, which is preferably athermally and electrically conductive metallic heat sink and isrelatively large compared to the device. The supporting base may, forexample, be a block of copper. The indium layers on the metal plate andon the supporting base are then united by pressing one in contact withthe other. Preferably fresh flat surfaces are exposed on the indiumlayers prior to this step, and angular rotation is effected between thedeviceplate assembly and the supporting base while maintaining thepressure. Since indium is weldable at relatively low temperatures andmoderate pressures, molecular attraction causes the two fresh flatindium surfaces to coalesce and disappear. A single layer of indium isthus formed, and the device is thus bonded to the base at roomtemperature. As the base support is fabricated from thermally andelectrically conductive material and the mass of the support isrelatively large compared to the mass of the device, the base not onlyprovides mechanical support and electrical contact for the device, butalso becomes a heat dissipator for cooling the unit. If desired, forcedfluid cooling means may be provided within the heat dissipator.

The invention and its features will be more fully described by thefollowing detailed description, in conjunction with the drawing,wherein:

FIGURES 1-7 are sectional elevational views of a semiconductor deviceincluding a heat dissipator, showing successive steps in the fabricationof such a device in accordance with a method of this invention;

FIGURE 8 is a schematic perspective view of apparatus used to expose afresh flat surface on an indium coating or layer which has beendeposited on a supporting base;

FIGURE 9 is a sectional view of apparatus used to expose a fresh flatsurface on an indium-coated metal plate which has been bonded to ajunction-type semiconductor device;

FIGURE 10 is a schematic perspective view of apparatus used to impartpressure and relative rotation between the semiconductor device-plateassembly and the supporting base which serves as a heat dissipator.

Similar reference numerals are applied to similar elements throughoutthe drawing.

With reference to FIGURE 1, a supporting base 10 is prepared frommaterial having good thermal and electrical conductivity. The base isessentially a metallic block whose mass is relatively large compared tothe transistor, and heace can serve as a heat dissipator. A suitablematerial for this purpose is oxygen-free, high conductivity copper. Thesupporting base 10 may be pierced to receive terminal leads or pins. Inthis example, the support 10 holds a terminal lead or pin 11 in aneyelet 12 of insulating material such as glass or the like. A secondterminal lead 13 is held within a similar eyelet (not shown). A thirdpin 15 is in direct electrical and thermal contact with the base 10. Acoating or layer 16 of indium is deposited at the desired site on theupper surface of the base 10. The site may, for example, be the top of acentral boss 14. For example, a pellet or disc of indium about 10-15mils thick may be placed at the predetermined site and the assembly thenheated on a hot plate so that the indium melts and is fused to thedesired location. Preferably the indium pellet is dipped in a solutionof zinc chloride before soldering it to the base. The indium tends toball up and assume a hemispherical shape.

FIGURE 2 shows the support 10 after the indium layer 16 which wasoriginally 10-15 mils thick, has been shaved to a thickness of about 2-4mils. A fresh indium surface 21 is thus exposed, which is preferablyfiat and parallel to the upper surface of plate 10. The upper portion ofpins 11 and 13 is given a right angle bend at this time.

Referring to FIGURE 3 a junction semiconductor device 31 containing atleast one fused electrode 32 is prepared by conventional methods. Theincomplete device 31, which still requires mounting, electricalconnections, and easing, may be of any type known to the art, such asdiodes, triodes, tetrodes and unipolar transistors. In this example, theassembly 31 is a surface alloyed triode transistor such as describedgenerally in a paper by D. A. Jenny entitled A Germanium NPN AlloyJunction Transistor in the December 1953 Proceedings of the IRE. Thetransistor assembly 31 consists of an emitter electrode pellet 34 and asimilar collector electrode pellet 32 coaxially alloyed to oppositesurfaces of a semiconductor wafer 36. The wafer may consist ofgermanium, silicon, or the like. In this example, the wafer 36 is P-typegermanium, and electrode pellets 33 and 34 are composed of 99% lead-1%arsenic. A metal ring 38, which may for example be nickel, is ohmicallysoldered to the wafer 36 around the emitter electrode 34. The ring 38serves as the base tab, and has a tail 39 as shown in perspective inFIG- URE 10. An emitter lead has a flattened end 37 soldered over theemitter pellet 34, as shown in FIGURE 9. The collector electrode 32 isshaved to provide a fiat surface 33. This may be accomplished asdescribed below in connection with FIGURE 9. The exposed surface 33 ofthe lead-arsenic electrode 32 should preferably be fiat and parallel tothe germanium wafer 36.

Referring to FIGURE 4, one face of a metal disc 40 is soldered to thefiat surface 33 of collector electrode 32. During the same heating cyclean indium pellet 41 is soldered to the opposite face of the metal disc40. The disc 40 may consist of metals such as nickel, chromium, rhodium,platinum, osmium, iridium, and palladium and alloys of these materials,which exhibit good electrical and thermal conductivity and arerelatively inert both with respect to the semiconductor wafer 36 and tosubsequent etchants. In this example, the disc 40 consists of nickel.Preferably disc 40 is but little larger than fiat surface 33 of thecollector electrode 32, and has a mass relatively small compared todevice 31.

An important advantage of this invention is that the device may now beetched to remove the excess soldering flux and other impurities whichwere spread over electrode 32 as a result of the pervious soldering ofplate 40 to the electrode. These impurities tend to degrade theelectrical characteristics of the device in an irregular manner, so thata production run of similar units exhibits poor and variable quality ifthe impurities are not removed. As explained above, if the device 31 isdirectly soldered to the metal support 10, whose mass is considerablylarger than that of the device, it is impracticable to etch the unitsubsequently, since the support will react with large amounts of theetchant unless the former is made of a noble metal. The latter expedientis obviously too expensive for commercial units. However, plate or disc40 of the instant invention has a mass relatively small compared to themass of the unit, and hence the entire assembly can now be immersed inan etchant without diificulty. Etching may be performed as desired ineither an acid or an alkaline solution by known techniques. Electricaletching may also be utilized. In this example, etching is accomplishedby immersing the assembly of unit 31 and plate 40 with indium pellet 41in a bath consisting of hydrogen peroxide and deionized water for about30 minutes.

Referring to FIGURE 5, after the unit has been etched the indium pellet41 on plate 40 is shaved to a thickness of 2-3 mils so as to expose afresh fiat surface 50 which is preferably parallel to the nickel plate40 and the semiconductor wafer 36.

Referring to FIGURE 6, the semiconductor assembly 31 is positionedagainst the support 10 so that the fresh fiat surface 50 of indium layer41 on nickel plate 40 is in contact with the fresh flat surface 21 ofindium layer 16 on support 10. Preferably the exposed surfaces are lessthan minutes old, since a surface film of oxides and impurities tends toform on indium in air, and clean indium surfaces are desired for thepractice of the invention. A pressure of about 3500 to 7000 grams persquare inch of exposed electrode surface 33 is applied between thedevice 31 and the base 10. It is preferred to impart relative angularrotation between base 10 and assembly 31 while maintaining the pressure.Either the base or the assembly may be held fixed while the other isrotated. In this example, the supporting base 10 is held stationarywhile the assembly 31 is rotated. The exact amount and speed of rotationis not critical. The combination of pressure and rotation of theassembly relative to the base of about 10 to degrees is sufficient tocause the flat surface 21 of the indium layer 16 to coalesce with theflat surface 50 of the indium layer 41. No heat is required in thisoperation, and a bond having low thermal resistance is thereby formed.

Referring to FIGURE 7, the base tab 38 is electrically connected to pin11 by welding a conductive wire 72, known as a jumper wire, between pin11 and base tab 38. The emitter electrode 34 is connected to pin 13 bywelding jumper wire 71 between emitter lead 35 and pin 13. Externalelectrical contact to the collector electrode 32 may be achieved bymeans of pin 15.

The final step is to case the assembly by any convenient method known tothe art. In this example, a metallic cap '73 having a turned-out flange74 is welded to the mounting surface of the base 10 at the flange 74.All the welding steps are sufficiently remote from the semiconductivewafer 36 so as not to have any significant deleterious effects thereon.

The fresh clean flat surface of the indium layer or pellet 16 on base 10and the indium pellet 41 on plate 40 may be exposed by any convenientmethod. For example, the indium layer and the indium pellet may beshaved by hand with a razor blade. The assembly may then be manuallymounted on the supporting base. However, it is preferred to useapparatus such as shown in FIGURES 8, 9 and 10 for mass production ofsemiconductor junction devices in accordance with this invention.

Referring to FIGURE 8, the base 10 bearing the indium pellet or disc 16uppermost is positioned on the work table 82 of the shaving apparatus81. Positioning is accomplished by inserting pins 11, 13 and 15 intorecesses (not shown) in the work table 82. Adjacent the Work table 82 ofthe apparatus is a raised portion 83 containing a slot 84, which holdsand directs the cutting tool 85 over the indium disc 16. A single strokeof the cutting tool 85 across the indium disc 16 shaves off the upperportion of the disc 16, leaving a layer of indium about 2-4 mils thick,and exposing an indium surface 21 which is fresh, flat, and parallel tothe face of supporting base 10. The same apparatus is used to sliceindium pellet 41 on plate 40 of the device, and thus expose an indiumpellet 41 on plate 40 of the device, and thus expose an indium surface50 which is fresh, fiat, and parallel to plate 40 and wafer 36.

Referring to FIGURE 9, a flat surface 33 on the leadarsenic fusedelectrode 32 of the semiconductor assembly 31 is prepared by means ofslicing apparatus 91. The device 31 is pressed in a recess 92 of apivoted horizontal plate 93. The recess is deep enough to permit aportion of the alloyed electrode 32 to protrude below the layer surfaceof the pivoted plate 93. A horizontal blade 94 is fixed just below thelower surface of the pivoted plate 93. On swinging the plate 93 againstthe blade 94, the protruding portion of the collector electrode 32 issliced away, and a flat surface 33 is thereby exposed.

Referring to FIGURE 10, the apparatus 101 for mounting the semiconductorassembly 31 on the base 10 comprises a spring loaded pressure pin 102,and a drive pin 103, which are held in the lower end of an adjustable,vertically mounted, rotatable metal sleeve 104. The pressure pin 102 iscoaxial with the metal sleeve 104, while the drive pin 103 is offsetfrom the axis of sleeve 104. Attached to the sleeve 104 is a horizontalhandle 105 which controls the rotation and height of the sleeve. In thisexample, the spring loaded pressure pin 102 is adjusted to exert apressure of 5000 grams per square inch. The amount of rotation of thehandle 105 is preset by two positive stops. In this example, the handleis preset to rotate approximately 18 degrees. The plate 10 is positionedin the apparatus 81 so that the freshly exposed surface 21 of indiumlayer 16 is directly below the pressure pin 102. After the fresh flatsurface 50 of the indium layer 41 on plate 40 of assembly 31 has beenexposed in the apparatus shown in FIGURE 8, the assembly 31 is placed onbase 10 so that the fresh fiat indium surface 50 contacts the freshsurface 21 of the indium layer 16. The sleeve 104 is then lowered, sothat the pressure pin 102 is forced against the flat portion 37 of theemitter lead 35. A pressure of about 5000 grams per square inch is thusexerted between the flat indium-covered surface 50 and the flat surface21 of the indium layer. At the same time, the handle 105 is rotatedapproximately 18 degrees. This revolves the drive pin 103 against thetail 39 of the base tab 38, and hence causes the assembly 31 to rotateabout 18 degrees. A bond is thus formed, in which the fresh surface 50of indium layer 41 on plate 40 is coalesced with the fresh surface 21 ofthe indium layer 16 on the base 10. The bond is mechanically strong andhas low thermal resistance.

To provide still further cooling, the heat dissipator 10 may be providedwith a continuous channel (not shown), throughout which a fluid coolingmeans may be circulated during operation of the device.

It will be understood that while the invention has been described by wayof example in connection with a power transistor of the triode type, itis by no means limited by such application. Other types of semiconductorassemblies known to the art, and having a greater or smaller number ofelectrodes and PN junctions, may be similarly treated to provide goodthermal dissipation. For example, a single junction semiconductorassembly known as a diode may be prepared by alloying an indium pelletto a surface of a wafer of N-conductivity type germanium. The pellet maythen be shaved to expose a fresh fiat indium surface, and mounted on aheat dissipating base by the method described above.

Although the invention has been described with reference to a germaniumunit, it will be understood that the invention may be practiced withsurface alloyed devices in which the semiconductor wafer is composed ofother semiconductors such as gallium arsenide, indium phosphide, and thelike. For example, the invention may be practiced with surface alloyedsilicon devices such as described generally in a paper by H. Nelsonentitled A Silicon N-P-N Junction Transistor by the Alloy Process,Transistors I, published March 1956, by RCA Laboratories, Princeton, NewJersey. It will also be understood that the invention is equallyapplicable to PNP units, for example in which the alloyed electrodesconsist of aluminum or aluminum alloys.

There has thus been described a novel structure and arrangement forefficiently dissipating heat in power semiconductor devices. The effectis obtained by making a bond having low thermal resistance between adevice electrode where heat is generated, and a relatively large volumeheat dissipator. Measurements indicate that the thermal resistance ofthe bond made in accordance With this invention is about 4 C. per wattdissipated.

What is claimed is:

1. A semiconductor device comprising a thermally and electricallyconductive base, a layer of indium on one face of said base, a nickelplate coated on one major face with indium and bonded by said indiumcoating to said indium layer on said base, a lead-containing electrodebonded on one side to the opposite face of said nickel plate, and asemiconductor wafer alloyed to the opposite side of said electrode.

2. A semiconductor device comprising a thermally and electricallyconductive base, a layer of indium on one face of said base, said layerbeing about 2 to 4 mils thick and having a thermal resistance of about 4C. per Watt, a nickel plate coated on one major face with indium andbonded by said indium coating on said indium layer on said base, alead-containing electrode bonded on one side to the opposite face ofsaid nickel plate, and a semiconductor wafer alloyed to the oppositeside of said electrode.

3. A circuit element comprising:

a thermally and electrically conductive base;

a layer of indium on one major face of said base;

8 a nickel plate; a coating of indium on one face of said nickel plate;an indium-indium bond between said indium layer on said base and saidindium coating on said plate; an electrode bonded on one side thereof tothe face of said nickel plate opposite said indium-coated face; and,

a semiconductor wafer bonded to the side of said electrode opposite saidnickel plate.

4. A circuit element comprising:

a thermally and electrically conductive base;

a layer of indium on one major face of said base, said layer being abouttwo to four mils thick and having a thermal resistance of about 4 C. perWatt;

a nickel plate;

a coating of indium on one face of said nickel plate; an indium-indiumbond between said indium layer on said base and said indium coating onsaid plate; an electrode bonded on one side thereof to the face of saidnickel plate opposite said base; and, a semiconductor wafer bonded tothe other of said sides of said electrode opposite said nickel plate.

References Cited by the Examiner UNITED STATES PATENTS 2,762,953 9/1956Berman 3l7234 2,790,940 4/1957 Prince 3 l7235 2,825,667 3/1958 Mueller317-235 XR 2,981,873 4/1961 Eannarino et al 317234 2,986,678 5/1961Andres et al 317-234 3,025,435 3/1962 Green 317-234 3,089,067 5/1963Baird 3l7234 OTHER REFERENCES G. E. Transistor Manual (3rd ed.) July 23,1958.

DAVID J. GALVIN, Primary Examiner.

1. A SEMICONDUCTOR DEVICE COMPRISING A THERMALLY AND ELECTRICALLYCONDUCTIVE BASE, A LAYER OF INDIUM ON ONE FACE OF SAID BASE, A NICKELPLATE COATED ON ONE MAJOR FACE WITH INDIUM AND BONDED BY AID INDIUMCOATING TO SAID IDIUM LAYER ON SAID BASE, A LEAD-CONTAINING ELECTRODEBONDED ON ONE SIDE TO THE OPPOSITE FACEOF SAID NICKEL PLATE, AND ASEMICONDUCTOR WAFER ALLOYED TO THE OPPOSITE SIDE OF SAID ELECTRODE.